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ICRA
1994
IEEE

Developing Parallel Architectures for Range and Image Sensors

9 years 11 months ago
Developing Parallel Architectures for Range and Image Sensors
We describe a cost-effective method for developing parallel architectures which increase the performance of range and image sensors. A parametrised edge detector and its systolic implementation using Field-Programmable Gate Arrays (FPGAs) are presented. Experiments and analyses indicate that our circuits can satisfy the performance requirements, and some of the designs out-perform the software equivalent on a 486-based PC by nearly two orders of magnitude.
Shaori Guo, Wayne Luk, Penelope Probert
Added 08 Aug 2010
Updated 08 Aug 2010
Type Conference
Year 1994
Where ICRA
Authors Shaori Guo, Wayne Luk, Penelope Probert
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