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DAC
2002
ACM

A framework for evaluating design tradeoffs in packet processing architectures

10 years 24 days ago
A framework for evaluating design tradeoffs in packet processing architectures
We present an analytical method to evaluate embedded network packet processor architectures, and to explore their design space. Our approach is in contrast to those based on simulation, which tend to be infeasible when the design space is very large. We illustrate the feasibility of our method using a detailed case study. Categories and Subject Descriptors C.0 [Computer Systems Organization]: General--Modeling of computer architecture, System architectures; B.4.1 [Hardware]: Input/output and data communications--Data communication devices General Terms Performance, Design
Lothar Thiele, Matthias Gries, Samarjit Chakrabort
Added 13 Nov 2009
Updated 13 Nov 2009
Type Conference
Year 2002
Where DAC
Authors Lothar Thiele, Matthias Gries, Samarjit Chakraborty, Simon Künzli
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