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2005
IEEE

A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems

14 years 5 months ago
A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems
Designing NoC-based systems has become increasingly complex with support for multiple functionalities. Decisions regarding interconnections between the heterogeneous system components and routing of system communication affect system performance and power consumption. This research provides a heuristic to determine the neighborhood configuration for each component. By controlling the communication bandwidth allocation, simulation results with synthetic and real workloads indicate that our heuristic is able to control the peak power consumption, but at cost of throughput degradation.
Praveen Bhojwani, Rabi N. Mahapatra, Eun Jung Kim,
Added 01 Dec 2009
Updated 01 Dec 2009
Type Conference
Year 2005
Where VLSID
Authors Praveen Bhojwani, Rabi N. Mahapatra, Eun Jung Kim, Thomas Chen
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