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1998
IEEE

Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors

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Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole routing and cut-through switching are evaluated for these shared-memory multiprocessors that employ multistage interconnection network (MIN) and full map directory-based cache coherence protocol. The switch design also considers virtual channels and varying number of input buffers per switch. Based on this, four different switch architectures are presented and compared. The evaluation is based on execution-driven simulation using five different applications to capture the random bursty nature of the network traffic arrival. The round-robin memory management policy is implemented. We show that the use of cut-through switching with buffers and virtual channels improves the average message latency tremendously. The waiting times of messages at various stages of switches are also presented. Finally, we show the varia...
Laxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhile
Added 05 Aug 2010
Updated 05 Aug 2010
Type Conference
Year 1998
Where IPPS
Authors Laxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhilesh Kumar
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