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DATE
1998
IEEE

Interconnect Tuning Strategies for High-Performance Ics

9 years 2 months ago
Interconnect Tuning Strategies for High-Performance Ics
Interconnect tuning is an increasingly critical degree of freedom in the physical design of high-performance VLSI systems. By interconnect tuning, we refer to the selection of line thicknesses, widths and spacings in multi-layer interconnect to simultaneously optimize signal distribution, signal performance, signal integrity, and interconnect manufacturability and reliability. This is a key activity in most leading-edge design projects, but has received little attention in the literature. Our work provides the first technology-specific studies of interconnect tuning in the literature. We center on global wiring layers and interconnect tuning issues related to bus routing, repeater insertion, and choice of shielding/spacing rules for signal integrity and performance. We address four basic questions. (1) How should width and spacing be allocated to maximize performance for a given line pitch? (2) For a given line pitch, what criteria affect the optimal interval at which repeaters should...
Andrew B. Kahng, Sudhakar Muddu, Egino Sarto, Rahu
Added 04 Aug 2010
Updated 04 Aug 2010
Type Conference
Year 1998
Where DATE
Authors Andrew B. Kahng, Sudhakar Muddu, Egino Sarto, Rahul Sharma
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