Sciweavers

Share
GLVLSI
2010
IEEE

A linear statistical analysis for full-chip leakage power with spatial correlation

9 years 1 months ago
A linear statistical analysis for full-chip leakage power with spatial correlation
In this paper, we present an approved linear-time algorithm for statistical leakage analysis in the present of any spatial correlation condition (strong or weak). The new algorithm adopts a new set of uncorrelated variables over virtual grids to represent the original physical random variables and the grid size (thus of number of new random variables) is determined by the spatial correlation length. In this way, each physical variable is always represented by virtual variables locally. We prove that the number of neighboring virtual grids for each grid is not related to condition of spatial correlation, which leads to linear time complexity in terms of number of gates. We compute the gate leakage by the orthogonal polynomials based collocation method. The total leakage of a whole chip can be computed by simply summing up the coefficients of corresponding orthogonal polynomials for each grid. Furthermore, look-up table can be created to cache statistical information for each type of ga...
Ruijing Shen, Sheldon X.-D. Tan, Jinjun Xiong
Added 12 Oct 2010
Updated 12 Oct 2010
Type Conference
Year 2010
Where GLVLSI
Authors Ruijing Shen, Sheldon X.-D. Tan, Jinjun Xiong
Comments (0)
books