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VTS
1999
IEEE

A New Bare Die Test Methodology

13 years 9 months ago
A New Bare Die Test Methodology
1 While multichip module technology has been developed for high performance IC applications, the technology is not widely adopted due to economical reasons. One of the reasons that makes the technology economically unattractive is the problems and the high cost associated with testing and diagnosing each individual un-packaged ICs in the system and the MCM module itself. The low MCM system yield prevents the technology from being used other than in high cost and high performance applications. In this paper, we propose a new methodology using ideas of tester-on-a-chip and a pressure contact technology to test bare dies. This methodology can reduce the IC testing cost and overall cost of the MCM module. It can also be considered as an alternative to high speed wafer probe. We designed an experiment for SRAM dies to examine the feasibility of this new method.
Zao Yang, K.-T. Cheng, K. L. Tai
Added 04 Aug 2010
Updated 04 Aug 2010
Type Conference
Year 1999
Where VTS
Authors Zao Yang, K.-T. Cheng, K. L. Tai
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