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DAC
1995
ACM

New Performance-Driven FPGA Routing Algorithms

12 years 3 months ago
New Performance-Driven FPGA Routing Algorithms
—Motivated by the goal of increasing the performance of FPGA-based designs, we propose new Steiner and arborescence FPGA routing algorithms. Our Steiner tree constructions significantly outperform the best known ones and have provably good performance bounds. Our arborescence heuristics produce routing solutions with optimal source–sink pathlengths, and with wirelength on par with the best existing Steiner tree heuristics. We have incorporated these algorithms into an actual FPGA router, which routed a number of industrial circuits using channel width considerably smaller than is achievable by previous routers. Our routing results for both the 3000 and 4000-series Xilinx parts are currently the best known in the literature.
Michael J. Alexander, Gabriel Robins
Added 26 Aug 2010
Updated 26 Aug 2010
Type Conference
Year 1995
Where DAC
Authors Michael J. Alexander, Gabriel Robins
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