36 search results - page 1 / 8 » New Performance-Driven FPGA Routing Algorithms |
DAC
1995
ACM
13 years 8 months ago
1995
ACM
—Motivated by the goal of increasing the performance of FPGA-based designs, we propose new Steiner and arborescence FPGA routing algorithms. Our Steiner tree constructions signiï...
ICCAD
1994
IEEE
13 years 8 months ago
1994
IEEE
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
FPGA
2008
ACM
13 years 6 months ago
2008
ACM
This paper describes the Amorphous FPGA, an innovative architecture attempting to optimally allocate logic and routing resource on per-mapping basis. Designed for high performance...
FPL
1997
Springer
13 years 8 months ago
1997
Springer
We describe the capabilities of and algorithms used in a new FPGA CAD tool, Versatile Place and Route (VPR). In terms of minimizing routing area, VPR outperforms all published FPG...
ICCAD
1994
IEEE
13 years 8 months ago
1994
IEEE
Several industrial FPGA routing architectures have been shown to have no efficient routing algorithms (unless P=NP) [3,4]. Here, we further investigate if the intractability of th...