Response Compaction for Test Time and Test Pins Reduction Based on Advanced Convolutional Codes

This paper addresses the problem of test response compaction. In order to maximize compaction ratio, a single-output encoder based on check matrix of a (n, n1, m, 3) convolutional code is presented. When the proposed four theorems are satisfied, the encoder can avoid two and any odd erroneous bit cancellations, handle one unknown bit(X bit) and diagnose one erroneous bit. Two types of encoders are proposed to implement the check matrix of the convolutional code. Large number of X bits can be tolerated by choosing a proper memory size and weight of check matrix, which can also be obtained by an optimized input assignment algorithm. Some experimental results would verify the efficiency of the proposed optimized algorithm.

• Type: Conference
• Year: 2004
• Where: DFT
• Authors: Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman Chandra
• Keywords: Check Matrix, Convolutional Code, DFT 2004, Erroneous Bit, VLSI