Scaling and Packing on a Chip Multiprocessor

Power management is critical in server and high-performancecomputing environments as well as in mobile computing. Many mechanisms have been developed over recent years to support a wide a variety of power management techniques. In particular, general purpose microprocessors now support dynamically modifying the power-performance state through voltage and frequency changes. This development spawned a very important area of this research in dynamic voltage and frequency scaling (DVFS). On the other hand, in a multiprocessor environment one can perform power management by offlining and idling processors when computational demand is low in a technique called CPU packing. This paper examines the effect of combining voltage and frequency scaling and CPU packing in a multiprocessor. Furthermore, it examines DVFS on a chip multiprocessor in which multiple processor cores are placed on a single die. This paper shows that in general one should use DVFS first, then CPU packing. Furthermore, we...

• Type: Conference
• Year: 2007
• Where: IPPS
• Authors: Vincent W. Freeh, Tyler K. Bletsch, Freeman L. Rawson III
• Keywords: CPU Packing, Distributed And Parallel Computing, Frequency Scaling, IPPS 2007, Power Management