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2007
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At-Speed Testing of Core-Based System-on-Chip Using an Embedded Micro-Tester

10 years 3 months ago
At-Speed Testing of Core-Based System-on-Chip Using an Embedded Micro-Tester
In SoC designs, limited test access to internal cores, lowcost external tester’s lack of accuracy and slow frequencies make application of at-speed tests impractical. Therefore, this paper presents an embedded micro-tester for testing IEEE1500-compliant SoCs. In the proposed approach, the test program is no more executed by the external tester but by the embedded micro-tester. Under the control of the embedded SoC microprocessor, the micro-tester executes the test programs stored outside of the SoC in an external memory. The micro-tester supports stuck-at testing as well as both atspeed testing techniques: Launch-On-Last-Shift (LOLS) and Launch-On-Capture (LOC). Using the ITC’02 benchmarks, experimental results are presented: test application time, test data volume and area overhead.
Matthieu Tuna, Mounir Benabdenbi, Alain Greiner
Added 04 Jun 2010
Updated 04 Jun 2010
Type Conference
Year 2007
Where VTS
Authors Matthieu Tuna, Mounir Benabdenbi, Alain Greiner
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