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DATE
2004
IEEE

Time-Energy Design Space Exploration for Multi-Layer Memory Architectures

9 years 10 months ago
Time-Energy Design Space Exploration for Multi-Layer Memory Architectures
This paper presents an exploration algorithm which examines execution time and energy consumption of a given application, while considering a parameterized memory architecture. The input to our algorithm is an application given as an annotated task graph and a specification of a multi-layer memory architecture. The algorithm produces Pareto trade-off points representing different multi-objective execution options for the whole application. Different metrics are used to estimate parameters for application-level Pareto points obtained by merging all Pareto diagrams of the tasks composing the application. We estimate application execution time although the final scheduling is not yet known. The algorithm makes it possible to trade off the quality of the results and its runtime depending on the used metrics and the number of levels in the hierarchical composition of the tasks' Pareto points. We have evaluated our algorithm on a medical image processing application and randomly genera...
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuc
Added 20 Aug 2010
Updated 20 Aug 2010
Type Conference
Year 2004
Where DATE
Authors Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuchcinski
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