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FPGA
2008
ACM

Vector processing as a soft-core CPU accelerator

13 years 5 months ago
Vector processing as a soft-core CPU accelerator
The currently accepted method of accelerating applications in FPGA soft processor systems is to design a custom hardware accelerator. This paper suggests the alternative approach of adding a vector processing core to the soft processor as a general-purpose accelerator. The approach has the benefit of a purely software-oriented development model. With no hardware design experience needed, a software programmer can make area-versus-performance tradeoffs by scaling the number of functional units or vector lanes. This paper shows that a vector processing architecture maps efficiently into an FPGA and provides a scalable amount of performance for a reasonable amount of area. Three configurations of the soft vector processor with different performance levels are estimated to achieve scalable speedup ranging from 3
Jason Yu, Guy Lemieux, Christopher Eagleston
Added 26 Oct 2010
Updated 26 Oct 2010
Type Conference
Year 2008
Where FPGA
Authors Jason Yu, Guy Lemieux, Christopher Eagleston
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