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FPGA
2000
ACM
145views FPGA» more  FPGA 2000»
13 years 8 months ago
A C compiler for a processor with a reconfigurable functional unit
This paper describes a C compiler for a mixed Processor/FPGA architecture where the FPGA is a Reconfigurable Functional Unit (RFU). It presents three compilation techniques that c...
Zhi Alex Ye, U. Nagaraj Shenoy, Prithviraj Banerje...
ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
13 years 9 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for applicationāˆ’specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...
VLSID
2002
IEEE
125views VLSI» more  VLSID 2002»
14 years 5 months ago
Software Pipelining for Coarse-Grained Reconfigurable Instruction Set Processors
This paper shows that software pipelining can be an effective technique for code generation for coarse-grained reconfigurable instruction set processors. The paper describes a tec...
Francisco Barat, Murali Jayapala, Pieter Op de Bee...
FCCM
1997
IEEE
129views VLSI» more  FCCM 1997»
13 years 9 months ago
The Chimaera reconfigurable functional unit
By strictly separating reconfigurable logic from their host processor, current custom computing systems suffer from a significant communication bottleneck. In this paper we descri...
Scott Hauck, Thomas W. Fry, Matthew M. Hosler, Jef...
VLSI
2007
Springer
13 years 11 months ago
An efficient heterogeneous reconfigurable functional unit for an adaptive dynamic extensible processor
Replacing functional units of an extensible processor with reconfigurable functional units enhances performance and flexibility of processors to execute custom instructions. That ...
Arash Mehdizadeh, Behnam Ghavami, Morteza Saheb Za...