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VLSID
2002
IEEE
125views VLSI» more  VLSID 2002»
14 years 5 months ago
Software Pipelining for Coarse-Grained Reconfigurable Instruction Set Processors
This paper shows that software pipelining can be an effective technique for code generation for coarse-grained reconfigurable instruction set processors. The paper describes a tec...
Francisco Barat, Murali Jayapala, Pieter Op de Bee...
ARC
2010
Springer
167views Hardware» more  ARC 2010»
13 years 8 months ago
Systolic Algorithm Mapping for Coarse Grained Reconfigurable Array Architectures
Coarse Grained Reconfigurable Array (CGRA) architectures give high throughput and data reuse for regular algorithms while providing flexibility to execute multiple algorithms on th...
Kunjan Patel, Chris J. Bleakley
ERSA
2006
105views Hardware» more  ERSA 2006»
13 years 6 months ago
A Column Arrangement Algorithm for a Coarse-grained Reconfigurable Architecture
In a coarse-grained reconfigurable architecture, the functions of resources such as Arithmetic Logic Units (ALUs) can be reconfigured. Unlike the programmability of a general purp...
Yuanqing Guo, Cornelis Hoede, Gerard J. M. Smit
ESTIMEDIA
2007
Springer
13 years 8 months ago
Still Image Processing on Coarse-Grained Reconfigurable Array Architectures
Due to the increasing demands on efficiency, performance and flexibility reconfigurable computational architectures are very promising candidates in embedded systems design. Recent...
Matthias Hartmann, Vasileios (Vassilis) Pantazis, ...