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IMECS
2007
13 years 6 months ago
A Common Subexpression Sharing Approach for Multiplierless Synthesis of Multiple Constant Multiplications
—In the context of multiple constant multiplications (MCM) design, we propose a novel common-subexpression-elimination (CSE) algorithm that models synthesis of coefficients into ...
Yuen-Hong Alvin Ho, Chi-Un Lei, Ngai Wong
ISSS
1997
IEEE
142views Hardware» more  ISSS 1997»
13 years 9 months ago
Optimization Method for Broadband Modem FIR Filter Design using Common Subexpression Elimination
- An approach for broadband modem FIR filter design optimization is presented. It addresses the minimization of the number of addersubtractors used in the hardware implementation o...
Robert Pasko, Patrick Schaumont, Veerle Derudder, ...
DAC
2004
ACM
14 years 6 months ago
Multiple constant multiplication by time-multiplexed mapping of addition chains
An important primitive in the hardware implementations of linear DSP transforms is a circuit that can multiply an input value by one of several different preset constants. We prop...
James C. Hoe, Markus Püschel, Peter Tummeltsh...
ISCAS
2006
IEEE
112views Hardware» more  ISCAS 2006»
13 years 11 months ago
Towards an optimised VLSI design algorithm for the constant matrix multiplication problem
The efficient design of multiplierless implementa- The goal is to find the optimal sub-expressions across all N dot tions of constant matrix multipliers is challenged by the huge p...
Andrew Kinane, Valentin Muresan, Noel E. O'Connor
ICCAD
2000
IEEE
148views Hardware» more  ICCAD 2000»
13 years 9 months ago
FIR Filter Synthesis Algorithms for Minimizing the Delay and the Number of Adders
—As the complexity of digital filters is dominated by the number of multiplications, many works have focused on minimizing the complexity of multiplier blocks that compute the co...
Hyeong-Ju Kang, Hansoo Kim, In-Cheol Park