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TVLSI
2008
187views more  TVLSI 2008»
13 years 5 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
14 years 1 days ago
Algorithms for the automatic extension of an instruction-set
Abstract—In this paper, two general algorithms for the automatic generation of instruction-set extensions are presented. The basic instruction set of a reconfigurable architectu...
Carlo Galuzzi, Dimitris Theodoropoulos, Roel Meeuw...
ICCAD
2005
IEEE
141views Hardware» more  ICCAD 2005»
14 years 2 months ago
Architecture and compilation for data bandwidth improvement in configurable embedded processors
Many commercially available embedded processors are capable of extending their base instruction set for a specific domain of applications. While steady progress has been made in t...
Jason Cong, Guoling Han, Zhiru Zhang
JAR
2006
103views more  JAR 2006»
13 years 5 months ago
A Framework for Verifying Bit-Level Pipelined Machines Based on Automated Deduction and Decision Procedures
We describe an approach to verifying bit-level pipelined machine models using a combination of deductive reasoning and decision procedures. While theorem proving systems such as AC...
Panagiotis Manolios, Sudarshan K. Srinivasan
MOBILIGHT
2010
13 years 3 months ago
A Framework for the Design Space Exploration of Software-Defined Radio Applications
Abstract. This paper describes a framework for the design space exploration of resource-efficient software-defined radio architectures. This design space exploration is based on a ...
Thorsten Jungeblut, Ralf Dreesen, Mario Porrmann, ...