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» A Genetic Testing Framework for Digital Integrated Circuits
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ICCAD
2000
IEEE
171views Hardware» more  ICCAD 2000»
13 years 9 months ago
A Parametric Test Method for Analog Components in Integrated Mixed-Signal Circuits
In this paper, we present a novel approach to use test stimuli generated by digital components of a mixed-signal circuit for testing its analog components. A wavelet transform is ...
Michael Pronath, Volker Gloeckel, Helmut E. Graeb
ICCAD
2003
IEEE
198views Hardware» more  ICCAD 2003»
14 years 1 months ago
A CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits
This paper introduces a CAD framework for co-simulation of hybrid circuits containing CMOS and SET (Single Electron Transistor) devices. An improved analytical model for SET is al...
Santanu Mahapatra, Kaustav Banerjee, Florent Pegeo...
VTS
2000
IEEE
97views Hardware» more  VTS 2000»
13 years 9 months ago
A Low-Speed BIST Framework for High-Performance Circuit Testing
Testing of high performance integrated circuits is becoming increasingly a challenging task owing to high clock frequencies. Often testers are not able to test such devices due to...
Hans G. Kerkhoff, Mansour Shashaani, Manoj Sachdev
ET
2002
97views more  ET 2002»
13 years 4 months ago
Test Generation for Crosstalk-Induced Faults: Framework and Computational Results
Due to technology scaling and increasing clock frequency, problems due to noise effects lead to an increase in design/debugging efforts and a decrease in circuit performance. This...
Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer
CP
1998
Springer
13 years 9 months ago
Generation of Test Patterns for Differential Diagnosis of Digital Circuits
In a faulty digital circuit, many (single) faulty gates may explain the observed findings. In this paper we are mostly concerned, not in obtaining alternative diagnoses, but rathe...
Francisco Azevedo, Pedro Barahona