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ISVLSI
2007
IEEE
185views VLSI» more  ISVLSI 2007»
14 years 3 months ago
A High Swing Low Power CMOS Differential Voltage-Controlled Ring Oscillator
This paper presents a two-stage CMOS differential voltage-controlled ring oscillator (VCO). The VCO is intended to operate as a frequency synthesizer in a PLL to generate local os...
Luciano Severino de Paula, Eric E. Fabris, Sergio ...
ASPDAC
2008
ACM
151views Hardware» more  ASPDAC 2008»
13 years 11 months ago
High performance current-mode differential logic
This paper presents a new logic style, named Current-Mode Differential logic (CMDL), that achieves both high operating speed and low power consumption. Inspired by the low-voltage ...
Ling Zhang, Jianhua Liu, Haikun Zhu, Chung-Kuan Ch...
ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
14 years 3 months ago
Low power circuit design based on heterojunction tunneling transistors (HETTs)
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
DATE
2008
IEEE
157views Hardware» more  DATE 2008»
14 years 3 months ago
Clock Distribution Scheme using Coplanar Transmission Lines
The current work describes a new standing wave oscillator scheme aimed for clock propagation on coplanar transmission lines on a silicon die. The design is aimed for clock signali...
Victor H. Cordero, Sunil P. Khatri