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ICCAD
2007
IEEE
128views Hardware» more  ICCAD 2007»
14 years 2 months ago
Module assignment for pin-limited designs under the stacked-Vdd paradigm
Abstract— This paper addresses the module assignment problem in pinlimited designs under the stacked-Vdd circuit paradigm. A partition-based algorithm is presented for efficient...
Yong Zhan, Tianpei Zhang, Sachin S. Sapatnekar
DELTA
2006
IEEE
13 years 9 months ago
Implementation of Four Real-Time Software Defined Receivers and a Space-Time Decoder using Xilinx Virtex 2 Pro Field Programmabl
This paper describes the concept, architecture, development and demonstration of a real time, high performance, software defined 4-receiver system and a space time decoder to be i...
Peter J. Green, Desmond P. Taylor
BMCBI
2010
218views more  BMCBI 2010»
13 years 5 months ago
Fast multi-core based multimodal registration of 2D cross-sections and 3D datasets
Background: Solving bioinformatics tasks often requires extensive computational power. Recent trends in processor architecture combine multiple cores into a single chip to improve...
Michael Scharfe, Rainer Pielot, Falk Schreiber
WISA
2004
Springer
13 years 10 months ago
Hyperelliptic Curve Coprocessors on a FPGA
Abstract. Cryptographic algorithms are used in a large variety of different applications to ensure security services. It is, thus, very interesting to investigate various implement...
Howon Kim, Thomas J. Wollinger, YongJe Choi, Kyoil...
FPGA
2004
ACM
163views FPGA» more  FPGA 2004»
13 years 9 months ago
Time and area efficient pattern matching on FPGAs
Pattern matching for network security and intrusion detection demands exceptionally high performance. Much work has been done in this field, and yet there is still significant roo...
Zachary K. Baker, Viktor K. Prasanna