5 search results - page 1 / 1 » A Low-Overhead Asynchronous Interconnection Network for GALS... |
NOCS
2010
IEEE
13 years 3 months ago
2010
IEEE
A new asynchronous interconnection network is introduced for globally-asynchronous locally-synchronous (GALS) chip multiprocessors. The network eliminates the need for global cloc...
TPDS
2008
13 years 4 months ago
2008
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On th...
HPCA
2007
IEEE
14 years 5 months ago
2007
IEEE
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
TVLSI
2010
12 years 11 months ago
2010
A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost, flexible routing capability, and supports globally asynchronous loc...
ASYNC
2005
IEEE
13 years 10 months ago
2005
IEEE
Networks on Chip that can guarantee Quality of Service (QNoC) are based on special routers that can support multiple service levels. GALS SoCs call for asynchronous NoC implementa...