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» A Memory Soft Error Measurement on Production Systems
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ICCAD
2007
IEEE
116views Hardware» more  ICCAD 2007»
14 years 3 months ago
Device and architecture concurrent optimization for FPGA transient soft error rate
Late CMOS scaling reduces device reliability, and existing work has studied the permanent SER (soft error rate) for configuration memory in FPGA extensively. In this paper, we sh...
Yan Lin, Lei He
DSN
2002
IEEE
13 years 11 months ago
Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic
This paper examines the effect of technology scaling and microarchitectural trends on the rate of soft errors in CMOS memory and logic circuits. We describe and validate an end-to...
Premkishore Shivakumar, Michael Kistler, Stephen W...
MICRO
2007
IEEE
188views Hardware» more  MICRO 2007»
14 years 11 days ago
Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding
In deep sub-micron ICs, growing amounts of ondie memory and scaling effects make embedded memories increasingly vulnerable to reliability and yield problems. As scaling progresses...
Jangwoo Kim, Nikos Hardavellas, Ken Mai, Babak Fal...
ASPDAC
2005
ACM
106views Hardware» more  ASPDAC 2005»
13 years 8 months ago
Using loop invariants to fight soft errors in data caches
Ever scaling process technology makes embedded systems more vulnerable to soft errors than in the past. One of the generic methods used to fight soft errors is based on duplicati...
Sri Hari Krishna Narayanan, Seung Woo Son, Mahmut ...
ASPDAC
2006
ACM
97views Hardware» more  ASPDAC 2006»
14 years 2 days ago
Object duplication for improving reliability
— Soft errors are becoming a common problem in current systems due to the scaling of technology that results in the use of smaller devices, lower voltages, and power-saving techn...
Guilin Chen, Mahmut T. Kandemir, Narayanan Vijaykr...