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VLSID
2004
IEEE
147views VLSI» more  VLSID 2004»
14 years 6 months ago
Computing Silent Gate Models for Noise Analysis from Slew and Delay Tables
Abstract--In this paper, we present a new approach to calculate the steady state resistance values for CMOS library gates. These resistances are defined as simple equivalent models...
Shabbir H. Batterywala, Narendra V. Shenoy
ICCAD
2008
IEEE
109views Hardware» more  ICCAD 2008»
14 years 6 days ago
Transition-aware decoupling-capacitor allocation in power noise reduction
— Dynamic power noises may not only degrade the circuit performance but also reduce the noise margin which may result in the functional errors in integrated circuit. Decoupling c...
Po-Yuan Chen, Che-Yu Liu, TingTing Hwang
ISCAS
2006
IEEE
127views Hardware» more  ISCAS 2006»
13 years 11 months ago
On-die decoupling capacitance: frequency domain analysis of activity radius
—On-die capacitances interact with the inductance and resistance of the power distribution network to supply electrical charge. A distributed model is generally required to analy...
Michael Sotman, Avinoam Kolodny, Mikhail Popovich,...
TVLSI
2008
207views more  TVLSI 2008»
13 years 5 months ago
Effective Radii of On-Chip Decoupling Capacitors
Decoupling capacitors are widely used to reduce power supply noise. On-chip decoupling capacitors have traditionally been allocated into the white space available on a die or place...
Mikhail Popovich, Michael Sotman, Avinoam Kolodny,...
ISCAS
2005
IEEE
130views Hardware» more  ISCAS 2005»
13 years 11 months ago
RLC coupling-aware simulation for on-chip buses and their encoding for delay reduction
Inductance effects of on-chip interconnects have become more and more significant in today’s high-speed digital circuits, especially for global interconnects such as signal buse...
Shang-Wei Tu, Jing-Yang Jou, Yao-Wen Chang