46 search results - page 3 / 10 » A Methodology for Guided Behavioral-Level Optimization |
CODES
2008
IEEE
13 years 6 months ago
2008
IEEE
With power becoming a major constraint for multi-processor embedded systems, it is becoming important for designers to characterize and model processor power dissipation. It is cr...
DAC
2000
ACM
14 years 7 months ago
2000
ACM
We have developed a function-level power estimation methodology for predicting the power dissipation of embedded software. For a given microprocessor core, we empirically build th...
ICCAD
2000
IEEE
13 years 10 months ago
2000
IEEE
Abstract— Deep submicron technology scaling has two major ramifications on the design process. First, reduced feature size significantly increases wire delay, thus resulting in...
DATE
1998
IEEE
13 years 10 months ago
1998
IEEE
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...
ICRA
2005
IEEE
13 years 11 months ago
2005
IEEE
— In this paper, two designs for optimal Automated Guided Vehicle (AGV) transportation systems are presented. One is vertical and the other, horizontal. For these systems, the hy...