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ISLPED
2006
ACM
83views Hardware» more  ISLPED 2006»
13 years 11 months ago
Considering process variations during system-level power analysis
Process variations will increasingly impact the operational characteristics of integrated circuits in nanoscale semiconductor technologies. Researchers have proposed various desig...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...
DT
2000
88views more  DT 2000»
13 years 5 months ago
Postsilicon Validation Methodology for Microprocessors
f abstraction as applicable to break the problem's complexity, and innovating better techniques to address complexity of new microarchitectural features. Validation techniques...
Hemant G. Rotithor
LCTRTS
2010
Springer
13 years 10 months ago
Cache vulnerability equations for protecting data in embedded processor caches from soft errors
Continuous technology scaling has brought us to a point, where transistors have become extremely susceptible to cosmic radiation strikes, or soft errors. Inside the processor, cac...
Aviral Shrivastava, Jongeun Lee, Reiley Jeyapaul
DAC
2005
ACM
14 years 6 months ago
Microarchitecture-aware floorplanning using a statistical design of experiments approach
Since across-chip interconnect delays can exceed a clock cycle in nanometer technologies, it has become essential in high performance designs to add flip-flops on wires with multi...
Vidyasagar Nookala, Ying Chen, David J. Lilja, Sac...
CCECE
2006
IEEE
13 years 12 months ago
Blood Impedance Characterization from Pulsatile Measurements
This paper describes an in vivo measurement technique to calculate dielectric properties of blood excluding the contributions from surrounding tissues, based on analysis of the pu...
Tao Dai, Andy Adler