Sciweavers

5 search results - page 1 / 1
» A Multiprocessor DSP System Using PADDI-2
Sort
View
DAC
1998
ACM
14 years 6 months ago
A Multiprocessor DSP System Using PADDI-2
Roy A. Sutton, Vason P. Srini, Jan M. Rabaey
DAC
1999
ACM
13 years 9 months ago
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar...
DAC
2007
ACM
14 years 6 months ago
Design Methodology for Pipelined Heterogeneous Multiprocessor System
Multiprocessor SoC systems have led to the increasing use of parallel hardware along with the associated software. These approaches have included coprocessor, homogeneous processo...
Seng Lin Shee, Sri Parameswaran
SIPS
2007
IEEE
13 years 11 months ago
Low-Overhead Run-Time Scheduling for Fine-Grained Acceleration of Signal Processing Systems
In this paper, we present four scheduling algorithms that provide flexible utilization of fine-grain DSP accelerators with low run-time overhead. Methods that have originally been...
Jani Boutellier, Shuvra S. Bhattacharyya, Olli Sil...
ITNG
2008
IEEE
13 years 11 months ago
Parallel FFT Algorithms on Network-on-Chips
This paper presents several parallel FFT algorithms with different degree of communication overhead for multiprocessors in Network-on-Chip(NoC) environment. Three different method...
Jun Ho Bahn, Jungsook Yang, Nader Bagherzadeh