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» A Network on Chip Architecture and Design Methodology
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DSD
2006
IEEE
131views Hardware» more  DSD 2006»
13 years 9 months ago
Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip
Abstract-- Networks-on-Chip will serve as the central integration platform in future complex SoC designs, composed of a large number of heterogeneous processing resources. Most res...
Christian Neeb, Norbert Wehn
DAC
1997
ACM
13 years 9 months ago
Power Supply Noise Analysis Methodology for Deep-Submicron VLSI Chip Design
This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...
Howard H. Chen, David D. Ling
ASPDAC
2008
ACM
164views Hardware» more  ASPDAC 2008»
13 years 7 months ago
The Shining embedded system design methodology based on self dynamic reconfigurable architectures
Complex design, targeting System-on-Chip based on reconfigurable architectures, still lacks a generalized methodology allowing both the automatic derivation of a complete system s...
Carlo Curino, Luca Fossati, Vincenzo Rana, Frances...
DAC
1999
ACM
13 years 10 months ago
A Floorplan-Based Planning Methodology for Power and Clock Distribution in ASICs
In deep submicron technology, IR-drop and clock skew issues become more crucial to the functionality of chip. This paper presents a oorplan-based power and clock distribution meth...
Joon-Seo Yim, Seong-Ok Bae, Chong-Min Kyung