639 search results - page 2 / 128 » A Networked FPGA-Based Hardware Implementation of a Neural N... |
FCCM
2000
IEEE
13 years 10 months ago
2000
IEEE
This paper describes a networked FPGA-based implementation of the FAST (Flexible Adaptable-Size Topology) architecture, a Arti cial Neural Network (ANN) that dynamically adapts it...
IPPS
2007
IEEE
14 years 9 days ago
2007
IEEE
DSP applications can be suitably represented using Process Network Models. This paper uses a modification of Kahn Process Network to solve the problem of finding an optimum arch...
ASPDAC
2009
ACM
14 years 15 days ago
2009
ACM
— This is the first implementation of an FPGA based on autonomous fine-grain power-gating. To cut the power consumption of clock network and detect the activity of the cell e...
IJCNN
2007
IEEE
14 years 9 days ago
2007
IEEE
Abstract— Hardware implementations of Spiking Neural Networks are numerous because they are well suited for implementation in digital and analog hardware, and outperform classic ...
FPL
2010
Springer
13 years 4 months ago
2010
Springer
The problem of Network Traffic Classification (NTC) has attracted significant amount of interest in the research community, offering a wide range of solutions at various levels. Th...