15 search results - page 1 / 3 » A New Pipelined Architecture for Fuzzy Color Correction |
ASPDAC
1999
ACM
13 years 9 months ago
1999
ACM
ICPR
2000
IEEE
13 years 9 months ago
2000
IEEE
An effective image reproduction pipeline, spanning image capture, processing and display, must be designed to account for the properties of the human observer. In designing an ima...
VLSI
2010
Springer
13 years 3 months ago
2010
Springer
—Latency insensitivity is a promising design paradigm in the nanometer era since it has potential benefits of increased modularity and robustness to variations. Synchronous elas...
FPGA
2009
ACM
13 years 9 months ago
2009
ACM
This paper presents a new architecture for time-to-digital conversion enabling a time resolution of 17ps over a range of 50ns with a conversion rate of 20MS/s. The proposed archit...
ASPLOS
2004
ACM
13 years 10 months ago
2004
ACM
Pipeline flushes are becoming increasingly expensive in modern microprocessors with large instruction windows and deep pipelines. Selective re-execution is a technique that can r...