73 search results - page 2 / 15 » A New Pipelined Array Architecture for Signed Multiplication |
DATE
2007
IEEE
13 years 5 months ago
2007
IEEE
Multiple Input - Multiple Output (MIMO) wireless technology involves highly complex vectors and matrix computations which are directly related to increased power and area consumpt...
CF
2005
ACM
13 years 7 months ago
2005
ACM
Data-driven array architectures seem to be important alternatives for coarse-grained reconfigurable computing platforms. Their use has provided performance improvements over micro...
VLSID
2006
IEEE
14 years 6 months ago
2006
IEEE
In this paper, a new realization for logic functions, namely Reversible Programmable Logic Array (RPLA), has been proposed. The proposed realization has the advantage of regularit...
IPPS
1996
IEEE
13 years 9 months ago
1996
IEEE
A new VLSI architecture for real-time pipeline FFT processor is proposed. A hardware oriented radix-22 algorithm is derived by integrating a twiddle factor decomposition technique ...
IFIP
2001
Springer
13 years 10 months ago
2001
Springer
: A new efficient type I architecture for motion estimation in video sequences based on the Full-Search Block-Matching (FSBM) algorithm is proposed in this paper. This architecture...