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» A New Scheduling Algorithm: Jumping Virtual Clock
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NOSSDAV
1995
Springer
13 years 8 months ago
Determining End-to-End Delay Bounds in Heterogeneous Networks
We define a class of Guaranteed Rate (GR) scheduling algorithms. The GR class includes Virtual Clock, Packet-byPacket Generalized Processor Sharing and Self Clocked Fair Queuing....
Pawan Goyal, Simon S. Lam, Harrick M. Vin
DAC
1994
ACM
13 years 9 months ago
Performance Analysis and Optimization of Schedules for Conditional and Loop-Intensive Specifications
This paper presents a new method,based on Markov chain analysis, to evaluate the performance of schedules of behavioral specifications. The proposed performance measure is the expe...
Subhrajit Bhattacharya, Sujit Dey, Franc Brglez
DATE
2006
IEEE
91views Hardware» more  DATE 2006»
13 years 9 months ago
Efficient incremental clock latency scheduling for large circuits
The clock latency scheduling problem is usually solved on the sequential graph, also called register-to-register graph. In practice, the the extraction of the sequential graph for...
Christoph Albrecht
ASPDAC
2006
ACM
103views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Low area pipelined circuits by multi-clock cycle paths and clock scheduling
— A new algorithm is proposed to reduce the number of intermediate registers of a pipelined circuit using a combination of multi-clock cycle paths and clock scheduling. The algor...
Bakhtiar Affendi Rosdi, Atsushi Takahashi
VLSID
2005
IEEE
98views VLSI» more  VLSID 2005»
14 years 5 months ago
False Path and Clock Scheduling Based Yield-Aware Gate Sizing
Timing margin (slack) needs to be carefully managed to ensure a satisfactory timing yield. We propose a new design flow that combines a false-path-aware gate sizing and a statisti...
Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Pin...