522 search results - page 1 / 105 » A Note on Designing Logical Circuits Using SAT |
ICES
2003
Springer
13 years 10 months ago
2003
Springer
Abstract. We present a systematic procedure for the synthesis and minimisation of digital circuits using propositional satisfiability. We encode the truth table into a canonical s...
DAC
2001
ACM
14 years 5 months ago
2001
ACM
In this paper, we present a new technique for the e cient dynamic detection and removal of inactive clauses, i.e. clauses that do not a ect the solutions of interest of a Boolean ...
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
Boolean Satisfiability is seeing increasing use as a decision procedure in Electronic Design Automation (EDA) and other domains. Most applications encode their domain specific cons...
ETS
2010
IEEE
13 years 5 months ago
2010
IEEE
It was shown in the past that ATPG based on the Boolean Satisfiability problem is a beneficial complement to traditional ATPG techniques. Its advantages can be observed especially ...
SAT
2007
Springer
13 years 11 months ago
2007
Springer
SAT solvers are often challenged with very hard problems that remain unsolved after hours of CPU time. The research community meets the challenge in two ways: (1) by improving the ...