Sciweavers

14 search results - page 2 / 3
» A Parametrical Architecture for Reed-Solomon Decoders
Sort
View
FCCM
2004
IEEE
91views VLSI» more  FCCM 2004»
13 years 9 months ago
An FPGA Interpolation Processor for Soft-Decision Reed-Solomon Decoding
We propose a parallel architecture for implementing the interpolation step in the Koetter-Vardy soft-decision ReedSolomon decoding algorithm. The key feature is the embedding of b...
Warren J. Gross, Frank R. Kschischang, P. Glenn Gu...
DATE
2008
IEEE
102views Hardware» more  DATE 2008»
13 years 11 months ago
Vectorization of Reed Solomon Decoding and Mapping on the EVP
Reed Solomon (RS) codes are used in a variety of (wireless) communication systems. Although commonly implemented in dedicated hardware, this paper explores the mapping of high-thr...
Akash Kumar, Kees van Berkel
ASAP
2009
IEEE
157views Hardware» more  ASAP 2009»
14 years 2 months ago
Low-Power ASIP Architecture Exploration and Optimization for Reed-Solomon Processing
The advent of the mobile age has heavily changed the requirements of today’s communication devices. Data transmission over interference-prone wireless channels requires addition...
Andreas Genser, Christian Bachmann, Christian Steg...
IOLTS
2005
IEEE
125views Hardware» more  IOLTS 2005»
13 years 11 months ago
Design of a Self Checking Reed Solomon Encoder
— In this paper, an innovative self-checking Reed Solomon encoder architecture is described. The presented architecture exploits some properties of the arithmetic operations in G...
Gian-Carlo Cardarilli, Salvatore Pontarelli, Marco...
DFT
2004
IEEE
90views VLSI» more  DFT 2004»
13 years 9 months ago
An XOR Based Reed-Solomon Algorithm for Advanced RAID Systems
In this paper, a simple codec algorithm based on Reed-Solomon (RS) codes is proposed for erasure correcting in RAID (Redundant Array of Independent Disks) level 6 systems. Unlike ...
Ping-Hsun Hsieh, Ing-Yi Chen, Yu-Ting Lin, Sy-Yen ...