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» A Reduced Complexity Algorithm for Minimizing N-Detect Tests
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DATE
2000
IEEE
86views Hardware» more  DATE 2000»
13 years 9 months ago
Analysis and Minimization of Test Time in a Combined BIST and External Test Approach
In this paper, an analysis of test time by CBET (which is an acronym for Combination of BIST and External Test) test approach is presented. The analysis validates that CBET test a...
Makoto Sugihara, Hiroto Yasuura, Hiroshi Date
COLING
2010
13 years 8 days ago
An Efficient Shift-Reduce Decoding Algorithm for Phrased-Based Machine Translation
In statistical machine translation, decoding without any reordering constraint is an NP-hard problem. Inversion Transduction Grammars (ITGs) exploit linguistic structure and can w...
Yang Feng, Haitao Mi, Yang Liu, Qun Liu
GECCO
2007
Springer
138views Optimization» more  GECCO 2007»
13 years 11 months ago
Reducing the space-time complexity of the CMA-ES
A limited memory version of the covariance matrix adaptation evolution strategy (CMA-ES) is presented. This algorithm, L-CMA-ES, improves the space and time complexity of the CMA-...
James N. Knight, Monte Lunacek
GLVLSI
2002
IEEE
98views VLSI» more  GLVLSI 2002»
13 years 10 months ago
Minimizing concurrent test time in SoC's by balancing resource usage
We present a novel test scheduling algorithm for embedded corebased SoC’s. Given a system integrated with a set of cores and a set of test resources, we select a test for each c...
Dan Zhao, Shambhu J. Upadhyaya, Martin Margala
DFT
2009
IEEE
106views VLSI» more  DFT 2009»
14 years 1 days ago
Reducing Test Point Area for BIST through Greater Use of Functional Flip-Flops to Drive Control Points
Recently, a new test point insertion method for pseudo-random built-in self-test (BIST) was proposed in [Yang 09] which tries to use functional flip-flops to drive control test po...
Joon-Sung Yang, Benoit Nadeau-Dostie, Nur A. Touba