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HPCA
2004
IEEE
14 years 6 months ago
Creating Converged Trace Schedules Using String Matching
This paper focuses on generating efficient software pipelined schedules for in-order machines, which we call Converged Trace Schedules. For a candidate loop, we form a string of t...
Satish Narayanasamy, Yuanfang Hu, Suleyman Sair, B...
ICCAD
2001
IEEE
184views Hardware» more  ICCAD 2001»
14 years 2 months ago
CALiBeR: A Software Pipelining Algorithm for Clustered Embedded VLIW Processors
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
Cagdas Akturan, Margarida F. Jacome
ISSS
2000
IEEE
109views Hardware» more  ISSS 2000»
13 years 9 months ago
FDRA: A Software-Pipelining Algorithm for Embedded VLIW Processors
The paper presents a novel software-pipelining algorithm suitable for optimizing compilers targeting embedded VLIW processors. The proposed algorithm is different from previous ap...
Cagdas Akturan, Margarida F. Jacome
VLSISP
2010
119views more  VLSISP 2010»
13 years 20 days ago
Hardware Acceleration of HMMER on FPGAs
We propose a new parallelization scheme for the hmmsearch function of the HMMER software, in order to target FPGA technology. hmmsearch is a very compute intensive software for bio...
Steven Derrien, Patrice Quinton
CODES
2006
IEEE
14 years 1 days ago
The pipeline decomposition tree: : an analysis tool for multiprocessor implementation of image processing applications
Modern embedded systems for image processing involve increasingly complex levels of functionality under real-time and resourcerelated constraints. As this complexity increases, th...
Dong-Ik Ko, Shuvra S. Bhattacharyya