109 search results - page 1 / 22 » A Self-Tuning Cache Architecture for Embedded Systems |
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
DAC
2007
ACM
14 years 6 months ago
2007
ACM
The memory hierarchy of a system can consume up to 50% of microprocessor system power. Previous work has shown that tuning a configurable cache to a particular application can red...
ISSS
2002
IEEE
13 years 10 months ago
2002
IEEE
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
DAC
2003
ACM
13 years 10 months ago
2003
ACM
The increasing use of microprocessor cores in embedded systems as well as mobile and portable devices creates an opportunity for customizing the cache subsystem for improved perfo...
SEUS
2009
IEEE
13 years 11 months ago
2009
IEEE
Future embedded systems are expected to use chip-multiprocessors to provide the execution power for increasingly demanding applications. Multiprocessors increase the pressure on th...