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DATE
2004
IEEE
135views Hardware» more  DATE 2004»
10 years 5 months ago
A Simulation-Based Power-Aware Architecture Exploration of a Multiprocessor System-on-Chip Design
We present the design exploration of a System-on-Chip architecture dedicated to the implementation of the HIPERLAN/2 communication protocol. The task was accomplished by means of ...
Francesco Menichelli, Mauro Olivieri, Luca Benini,...
ARCS
2006
Springer
10 years 5 months ago
Estimating Energy Consumption for an MPSoC Architectural Exploration
Early energy estimation is increasingly important in MultiProcessor System-On-Chip (MPSoC) design. Applying traditional approaches, which consist in delaying the estimation until t...
Rabie Ben Atitallah, Smaïl Niar, Alain Greine...
DAC
2006
ACM
10 years 3 months ago
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
David Atienza, Pablo Garcia Del Valle, Giacomo Pac...
CODES
2009
IEEE
10 years 6 months ago
Native MPSoC co-simulation environment for software performance estimation
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
Patrice Gerin, Mian Muhammad Hamayun, Fréd&...
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