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» A Unified Architectural Tradeoff Methodology
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ISSS
2002
IEEE
126views Hardware» more  ISSS 2002»
13 years 9 months ago
Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with th...
Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali...
GLOBECOM
2010
IEEE
13 years 2 months ago
Space-Time Shift Keying: A Unified MIMO Architecture
In this paper, we propose a novel Space-Time Shift Keying (STSK) modulation scheme for MIMO communication systems, where the concept of spatial modulation is extended to include bo...
Shinya Sugiura, Sheng Chen, Lajos Hanzo
MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
13 years 10 months ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
DAC
2000
ACM
13 years 9 months ago
An asymptotically constant, linearly bounded methodology for the statistical simulation of analog circuits including component m
Abstract: This paper presents a new statistical methodology to simulate the effect of both inter-die and intra-die variation on the electrical performance of analog integrated circ...
Carlo Guardiani, Sharad Saxena, Patrick McNamara, ...
DAC
2005
ACM
13 years 6 months ago
Unified high-level synthesis and module placement for defect-tolerant microfluidic biochips
Microfluidic biochips promise to revolutionize biosensing and clinical diagnostics. As more bioassays are executed concurrently on a biochip, system integration and design complex...
Fei Su, Krishnendu Chakrabarty