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» A VHDL-based bus model for multi-PCB system design
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DAC
2000
ACM
14 years 5 months ago
COSY communication IP's
The Esprit/OMI-COSY project defines transaction-levels to set-up the exchange of IP's in separating function from architecture and body-behavior from proprietary interfaces. ...
Erwin A. de Kock, Frédéric Pé...
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Software Performance Estimation in MPSoC Design
- Estimation tools are a key component of system-level methodologies, enabling a fast design space exploration. Estimation of software performance is essential in current software-...
Márcio Oyamada, Flávio Rech Wagner, ...
CORR
2007
Springer
127views Education» more  CORR 2007»
13 years 4 months ago
Common Reusable Verification Environment for BCA and RTL Models
This paper deals with a common verification methodology and environment for SystemC BCA and RTL models. The aim is to save effort by avoiding the same work done twice by different...
Giuseppe Falconeri, Walid Naifer, Nizar Romdhane
WSNA
2003
ACM
13 years 10 months ago
Analyzing and modeling encryption overhead for sensor network nodes
Recent research in sensor networks has raised security issues for small embedded devices. Security concerns are motivated by the deployment of a large number of sensory devices in...
Prasanth Ganesan, Ramnath Venugopalan, Pushkin Ped...
CODES
2004
IEEE
13 years 8 months ago
Low energy security optimization in embedded cryptographic systems
Future embedded and wireless devices will be increasingly powerful supporting many applications including one of the most crucial, security. Although many wireless and embedded de...
Catherine H. Gebotys