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» A calculator for Pareto points
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ACSD
2005
IEEE
103views Hardware» more  ACSD 2005»
13 years 11 months ago
An Algebra of Pareto Points
Marc Geilen, Twan Basten, Bart D. Theelen, Ralph O...
VLSI
2005
Springer
13 years 11 months ago
Pareto Points in SRAM Design Using the Sleepy Stack Approach
Leakage power consumption of current CMOS technology is already a great challenge. ITRS projects that leakage power consumption may come to dominate total chip power consumption a...
Jun-Cheol Park, Vincent John Mooney III
IJCGA
2010
91views more  IJCGA 2010»
13 years 2 months ago
Pareto Envelopes in Simple Polygons
For a set T of n points in a metric space (X, d), a point y X is dominated by a point x X if d(x, t) d(y, t) for all t T and there exists t T such that d(x, t ) < d(y, t )....
Victor Chepoi, Karim Nouioua, Edouard Thiel, Yann ...
DATE
2004
IEEE
105views Hardware» more  DATE 2004»
13 years 9 months ago
Time-Energy Design Space Exploration for Multi-Layer Memory Architectures
This paper presents an exploration algorithm which examines execution time and energy consumption of a given application, while considering a parameterized memory architecture. Th...
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuc...
ESTIMEDIA
2004
Springer
13 years 11 months ago
Data assignment and access scheduling exploration for multi-layer memory architectures
Abstract— This paper presents an exploration framework which performs data assignment and access scheduling exploration for applications given a multilayer memory architecture. O...
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuc...