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» A case for a working-set-based memory hierarchy
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CF
2005
ACM
13 years 6 months ago
A case for a working-set-based memory hierarchy
Modern microprocessor designs continue to obtain impressive performance gains through increasing clock rates and advances in the parallelism obtained via micro-architecture design...
Steve Carr, Soner Önder
CORR
2004
Springer
121views Education» more  CORR 2004»
13 years 4 months ago
Worst-Case Optimal Tree Layout in a Memory Hierarchy
Consider laying out a fixed-topology tree of N nodes into external memory with block size B so as to minimize the worst-case number of block memory transfers required to traverse ...
Erik D. Demaine, John Iacono, Stefan Langerman
ISCA
1996
IEEE
120views Hardware» more  ISCA 1996»
13 years 9 months ago
Missing the Memory Wall: The Case for Processor/Memory Integration
Current high performance computer systems use complex, large superscalar CPUs that interface to the main memory through a hierarchy of caches and interconnect systems. These CPU-c...
Ashley Saulsbury, Fong Pong, Andreas Nowatzyk
CORR
2007
Springer
111views Education» more  CORR 2007»
13 years 4 months ago
Influence of Memory Hierarchies on Predictability for Time Constrained Embedded Software
Safety-criticalembeddedsystems having to meet real-time constraints are to be highlypredictable in order to guarantee at design time that certain timing deadlines will always be m...
Lars Wehmeyer, Peter Marwedel
DATE
2004
IEEE
130views Hardware» more  DATE 2004»
13 years 8 months ago
Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology
This paper presents an environment based on SystemC for architecture specification of programmable systems. Making use of the new architecture description language ArchC, able to ...
Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Aze...