42 search results - page 1 / 9 » A case for dynamic frequency tuning in on-chip networks |
DSD
2006
IEEE
13 years 11 months ago
2006
IEEE
— An on-chip communication network is most power efficient when it operates just below the saturation point. For any given traffic load the network can be operated in this regi...
NOCS
2008
IEEE
13 years 11 months ago
2008
IEEE
In this paper, we introduce the use of slow-silent virtual channels to reduce the switching power of on-chip networks while keeping the leakage power small. Adding virtual channel...
MICRO
2009
IEEE
13 years 11 months ago
2009
IEEE
Performance and power are the first order design metrics for Network-on-Chips (NoCs) that have become the de-facto standard in providing scalable communication backbones for mult...
DSN
2007
IEEE
13 years 11 months ago
2007
IEEE
Synchronous circuits are typically clocked considering worst case timing paths so that timing errors are avoided under all circumstances. In the case of a pipelined processor, thi...
ICASSP
2008
IEEE
13 years 11 months ago
2008
IEEE
In this paper we present a family of algorithms for estimating stream weights for dynamic Bayesian networks with multiple observation streams. For the 2 stream case, we present a ...