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» A delay model for interconnect trees based on ABCD matrix
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ASPDAC
2008
ACM
99views Hardware» more  ASPDAC 2008»
13 years 6 months ago
A delay model for interconnect trees based on ABCD matrix
- The accuracy of interconnect delay estimations can be improved by the method presented in this paper in which the first two moments are obtained with ABCD matrix and a stable mod...
Guofei Zhou, Li Su, Depeng Jin, Lieguang Zeng
ICCAD
1996
IEEE
122views Hardware» more  ICCAD 1996»
13 years 9 months ago
Analytical delay models for VLSI interconnects under ramp input
Elmore delay has been widely used as an analytical estimate of interconnect delays in the performance-driven synthesis and layout of VLSI routing topologies. However,for typical R...
Andrew B. Kahng, Kei Masuko, Sudhakar Muddu
ISCAS
2005
IEEE
159views Hardware» more  ISCAS 2005»
13 years 10 months ago
A Fourier series-based RLC interconnect model for periodic signals
— Based on a Fourier series analysis, an analytic interconnect model is presented which is suitable for periodic signals, such as a clock signal. In this model, the far end time ...
Guoqing Chen, Eby G. Friedman
ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
13 years 8 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah