102 search results - page 1 / 21 » A design platform for 90-nm leakage reduction techniques |
DAC
2005
ACM
13 years 6 months ago
2005
ACM
Methodology, EDA Flow, scripts, and documentation plays a tremendous role in the deployment and standardization of advanced design techniques. In this paper we focus not only on l...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
—On-chip decoupling capacitors (decaps) are generally used to reduce power supply noise. Passive decap designs are reaching their limits in 90nm CMOS technology due to higher ope...
FPGA
2004
ACM
13 years 10 months ago
2004
ACM
We consider active leakage power dissipation in FPGAs and present a “no cost” approach for active leakage reduction. It is well-known that the leakage power consumed by a digi...
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
As process technology advances toward deep submicron (below 90nm), static power becomes a new challenge to address for energy-efficient high performance processors, especially for...
ISLPED
2005
ACM
13 years 10 months ago
2005
ACM
SRAM leakage constitutes a significant portion of the standby power budget of modern SoC products for handheld applications such as PDA and cellular phones. NMOS and PMOS reverse ...