39 search results - page 7 / 8 » A digital CMOS DNA chip |
GLVLSI
2003
IEEE
13 years 11 months ago
2003
IEEE
We present a unique FPGA that uses a mix of digital and large-signal analog computation for the simulation of gene regulatory networks. The prototype IC consists of a 4x5 array of...
ARC
2008
Springer
13 years 7 months ago
2008
Springer
Abstract. This paper presents a real time parallel hardware architecture for image feature detection based on the SIFT (Scale Invariant Feature Transform) algorithm. This architect...
ISLPED
2000
ACM
13 years 10 months ago
2000
ACM
In this paper we present a completely on-chip voltage regulation technique which promises to adjust the degree of voltage regulation in a digital logic chip in the face of process...
ISCAS
2007
IEEE
14 years 1 days ago
2007
IEEE
—The paper presents architecture and synthesis results for an organic computing hardware for smart CMOS camera chips. The organic behavior in the chip hardware is based on distri...
GI
2009
Springer
13 years 10 months ago
2009
Springer
: Future nano scale devices will expose different characteristics than todays silicon devices. While the exponential growth of non recurring expenses (NRE, mostly due to mask sets)...