182 search results - page 1 / 37 » A distributed processor state management architecture for la... |
MICRO
2008
IEEE
13 years 11 months ago
2008
IEEE
— Processor architectures with large instruction windows have been proposed to expose more instruction-level parallelism (ILP) and increase performance. Some of the proposed arch...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Recently proposed techniques for peak power management [5] involve centralized decision-making and assume quick evaluation of the various power management states. These techniques...
HIPC
2009
Springer
13 years 2 months ago
2009
Springer
Recently proposed techniques for peak power management [18] involve centralized decisionmaking and assume quick evaluation of the various power management states. These techniques...
DAC
2006
ACM
13 years 10 months ago
2006
ACM
A hierarchical power distribution methodology that enables more than dozen power domains in a chip and a power management scheme using 20 power domains are described. This method ...
HPCA
2006
IEEE
14 years 4 months ago
2006
IEEE
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...