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ISCAS
2006
IEEE
102views Hardware» more  ISCAS 2006»
13 years 11 months ago
A fast dual-field modular arithmetic logic unit and its hardware implementation
— We propose a fast Modular Arithmetic Logic Unit (MALU) that is scalable in the digit size (d) and the field size (k). The datapath of MALU has chains of Carry Save Adders (CSA...
Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede
ARC
2006
Springer
154views Hardware» more  ARC 2006»
13 years 8 months ago
Reconfigurable Modular Arithmetic Logic Unit for High-Performance Public-Key Cryptosystems
This paper presents a reconfigurable hardware architecture for Public-key cryptosystems. By changing the connections of coarse grain Carry-Save Adders (CSAs), the datapath provides...
Kazuo Sakiyama, Nele Mentens, Lejla Batina, Bart P...
ACSAC
2000
IEEE
13 years 9 months ago
The Chinese Remainder Theorem and its Application in a High-Speed RSA Crypto Chip
The performance of RSA hardware is primarily determined by an efficient implementation of the long integer modular arithmetic and the ability to utilize the Chinese Remainder The...
Johann Großschädl
ARITH
2001
IEEE
13 years 8 months ago
Computer Arithmetic-A Processor Architect's Perspective
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
Ruby B. Lee
ESAS
2006
Springer
13 years 6 months ago
Low-Cost Elliptic Curve Cryptography for Wireless Sensor Networks
This work describes a low-cost Public-Key Cryptography (PKC) based solution for security services such as key-distribution and authentication as required for wireless sensor networ...
Lejla Batina, Nele Mentens, Kazuo Sakiyama, Bart P...