25 search results - page 1 / 5 » A high level SoC power estimation based on IP modeling |
IPPS
2006
IEEE
13 years 10 months ago
2006
IEEE
Current electronic system design requires to be concerned with power consumption consideration. However, in a lot of design tools, the application power consumption budget is esti...
VLSID
2002
IEEE
14 years 4 months ago
2002
IEEE
Embedded DRAM (eDRAM) power-energy estimation is presented for system-on-a-chip (SOC) applications. The main feature is the signal swing based analytic (SSBA) model, which improve...
IPPS
2006
IEEE
13 years 10 months ago
2006
IEEE
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...
AHS
2007
IEEE
13 years 8 months ago
2007
IEEE
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
CODES
2004
IEEE
13 years 8 months ago
2004
IEEE
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...