159 search results - page 2 / 32 » A high throughput 3D-bus interconnect for network processors |
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
Network line cards are experiencing ever increasing line rates, random data bursts, and limited space. Hence, they are more vulnerable than other processormemory environments, to ...
ICCD
2006
IEEE
14 years 2 months ago
2006
IEEE
— A reduced complexity LDPC decoding method is presented that dramatically reduces wire interconnect complexity, which is a major issue in LDPC decoders. The proposed Split-Row m...
FPL
2008
Springer
13 years 6 months ago
2008
Springer
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
ICPPW
2005
IEEE
13 years 11 months ago
2005
IEEE
We study the performance of high-speed interconnects using a set of communication micro-benchmarks. The goal is to identify certain limiting factors and bottlenecks with these int...
VLDB
1995
ACM
13 years 8 months ago
1995
ACM
New telecommunication services and mobility networks have introduced databases in telecommunication networks. Compared with traditional use of databases, telecom databases must fu...